Ethernet frame encapsulation over VDSL using HDLC

ABSTRACT

An apparatus for and method of encapsulating Ethernet frame data in HDLC frames for transmission over a VDSL transport facility. The HDLC frames are transmitted over a point to point VDSL link where they are subsequently extracted and forwarded as standard Ethernet frames. The VDSL facility transport system comprises one or more Ethernet to VDSL CPEs coupled to a DSLAM over a VDSL transport facility. The Ethernet to VDSL CPE functions to receive a 10BaseT Ethernet signal and encapsulate the Ethernet frame into a HDLC frame for transmission over the VDSL facility. In one embodiment, a single chip microcontroller on the CPE performs both Ethernet controller and HDLC controller functions. The DSLAM is adapted to receive HDLC frames from one or more CPEs, extract Ethernet frames therefrom and generate and output a standard Ethernet signal. Ethernet frames are encapsulated within HDLC frames and transmitted on the wire pair without regard to the state of the SOC signals. This overcomes the problems associated with synchronizing the transmission of the Ethernet data with the SOC signals.

FIELD OF THE INVENTION

[0001] The present invention relates generally to data communicationsystems and more particularly relates to a system for transportingEthernet frames over Very high speed Digital Subscriber Line (VDSL)using the HDLC protocol.

BACKGROUND OF THE INVENTION

[0002] There is a growing need among both individuals and enterprisesfor access to a commonly available, cost effective network that providesspeedy, reliable services. There is high demand for a high-speed datanetwork, one with enough bandwidth to enable complex two-waycommunications. Such an application is possible today if, for example,access is available to a university or a corporation with sufficientfinances to build this type of network. But for the average homecomputer user or small business, access to high speed data networks isexpensive or simply impossible. Telephone companies are therefore eagerto deliver broadband services to meet this current explosion in demand.

[0003] One of the problems is that millions of personal computers havefound their place in the home market. Today, PCs can be found inapproximately 43% of all United States households and a full 50% ofUnited States teenagers own computers. Virtually every PC sold today isequipped with a modem, enabling communication with the outside world viacommercial data networks and the Internet. Currently, people use theirPCs to send and receive e-mail, to access online services, toparticipate in electronic commerce and to browse the Internet. Thepopularity of the Internet is such that there are an estimated 50million users around the globe. These figures indicate that in the pastfew years the personal computer has fueled a dramatic increase in datacommunications and the corresponding demands on the data networks thatcarry the traffic.

[0004] The Internet serves as a good example of the increased demandsthat have been placed on data networks. At first, Internet accessconsisted of text only data transfers. Recently, with the popularity ofthe World Wide Web (WWW) and the construction of numerous sites withhigh quality content, coupled with the development of Internet browserssuch as Mosaic, Netscape Navigator and Microsoft Explorer, the use ofgraphics, audio, video and text has surged on the Internet. Whilegraphics, audio and video make for a much more interesting way to viewinformation as opposed to plain text, bandwidth consumption issignificantly more. A simple background picture with accompanying textrequires approximately 10 times the bandwidth needed by text alone.Real-time audio and streaming video typically need even more bandwidth.Because of the increased requirement for bandwidth, activities such asbrowsing home pages or downloading graphics, audio and video files cantake a frustratingly long period of time. Considering that themultimedia rich World Wide Web accounts for more than one quarter of allInternet traffic, it is easy to see why the demand for bandwidth hasoutpaced the supply. In addition, the creative community is pushing theenvelope by offering audio and full motion video on numerous sites todifferentiate themselves from the millions of other sites competing formaximum user hits.

[0005] As use of the Internet and online services continues to spread,so does the use of more complex applications, such as interactive videogames, telecommuting, business to business communications and videoconferencing. These complex applications place severe strains on datanetworks because of the intensive bandwidth required to deliverdata-rich transmissions. For example, a telecommuter who requirescomputer aided design (CAD) software to be transported over the datanetwork requires a high-bandwidth data pipeline because of thesignificant size of CAD files. Similarly, a business to businesstransaction in which large database files containing thousand ofcustomer records are exchanged also consumes large amounts of bandwidth.The same is true for users seeking entertainment value from sitesoffering high quality video and audio. The lack of available bandwidthin today's data networks is the primary barrier preventing manyapplications from entering mainstream use. Just as processing powerlimited the effectiveness of early PCs, bandwidth constraints currentlylimit the capabilities of today 's modem user.

[0006] Most computer modem users access data through the standardtelephone network, known as plain old telephone service (POTS). Equippedwith today 's speediest modems, dial up modems on a POTS network canaccess data at a rate of 28.8, 33.6 or 56 Kbps. Dial up modemtransmission rates have increased significantly over the last few years,but POTS throughput is ultimately limited to 64 Kbps. While this ratemay be acceptable for some limited applications like e-mail, it is aserious bottleneck for more complex transactions, such as telecommuting,video conferencing or full-motion video viewing. To illustrate, fullmotion video compressed, using the Motion Picture Entertainment Group(MPEG)-2 standard requires a data stream of approximately 6 Mbps, orroughly 208 times the throughput of a 28.8 Kbps modem. Thus, using today's dial up modems, it would take more than 17 days to capture two hoursof video. As bandwidth demands continue to grow, providers search forbetter ways to offer high speed data access. Further complicating theproblem is the need to deliver all these complex services at anaffordable price.

[0007] Today 's most popular data access method is POTS. But asdiscussed previously, POTS is limited when it comes to large datatransfers. An alternative to POTS currently available is IntegratedServices Digital Network (ISDN). In the past few years, ISDN has gainedmomentum as a high-speed option to POTS. ISDN expands data throughput to64 or 128 Kbps, both from the network to the home and from the home backto the network, and can be technically made available throughout much ofthe United States and in many other parts of the globe. Similar to POTS,ISDN is a dedicated service, meaning that the user has sole access tothe line preventing other ISDN users from sharing the same bandwidth.ISDN is considered an affordable alternative, and in general, ISDN is amuch better solution for applications such as Web browsing and basictelecommuting. However, like POTS, it severely limits applications suchas telecommuting with CAD files and full-motion video viewing. Thelatter requires roughly 39 times the throughput than that provided byISDN. Multichannel multipoint distribution service (MMDS), a terrestrialmicrowave wireless delivery system, and direct broadcast satellite(DBS), such as DirecTv and US Satellite Broadcasting (USSB), arewireless networks. They both deliver high bandwidth data steams to thehome, referred to as downstream data, but neither has a return channelthrough which data is sent back over the network, referred to asupstream data. Although it is a relatively affordable system to deployfor broadcast applications, because it requires no cable wires to belaid, it falls short in interactive access. In order to use a wirelesssystem for something as basic as e-mail, an alternate technology such asa telephone line must be used for the upstream communications.

[0008] Another network delivery system is asymmetric digital subscriberline (ADSL). Offering a downstream capacity of 6 Mbps or more to thehome, ADSL has the downstream capacity to handle the most complex datatransfers, such as full motion video, as well as an upstream capacity ofat least 500 Kbps. However, due to its limitation of downstreambandwidth capacity, it essentially is a single service platform. Also,since it has to overcome the challenge of reusing several thousand feetof twisted pair wiring, the electronics required at each end of thecable are complex, and therefore currently very expensive.

[0009] Hybrid fiber coax (HFC), a network solution offered by telephoneand cable companies, is yet another option for delivering high bandwidthto consumers known in the art. However, HFC has limitations. HFCnetworks provide a downstream capacity of approximately 30 Mbps, whichcan be shared by up to 500 users. Upstream bandwidth is approximately 5Mbps and also is shared. A disadvantage with HFC is that sharedbandwidth and limited upstream capacity become serious bottlenecks whenhundreds of users are sending and receiving data on the network, withservice increasingly impaired as each user tries to access the network.

[0010] It is a current trend among telephone companies around the worldto include existing twisted pair copper loops in their next generationbroadband access networks. Hybrid Fiber Coax (HFC), a shared accessmedium well suited to analog and digital broadcast, comes up short whenutilized to carry voice telephony, interactive video and high speed datacommunications at the same time.

[0011] Fiber to the home (FTTH) is still prohibitively expensive in themarketplace that is soon to be driven by competition rather than costs.An alternative is a combination of fiber cables feeding neighborhoodOptical Network Units (ONUs) and last leg premises connections byexisting or new copper. This topology, which can be called fiber to theneighborhood (FTTN), encompasses fiber to the curb (FTTC) with shortdrops and fiber to the basement (FTTB), serving tall buildings withvertical drops.

[0012] One of the enabling technologies for FTTN is very high ratedigital subscriber line (VDSL). VDSL is an emerging standard that iscurrently undergoing discussion in ANSI and ETSI committees. The systemtransmits high-speed data over short reaches of twisted pair coppertelephone lines, with a range of speeds depending upon actual linelength.

[0013] The VDSL standard as provided by the VDSL Draft Specificationbeing drafted by the ANSI T1E1.4 Technical Subcommittee, providesguidelines for the transmitter and receiver within the VDSL modem. Theconnection between the VDSL modem and the Customer Premises Equipment(CPE) specifies a number of signals including TxData, RxData, RxErr,TxCLK, RxCLK and TxSOC and RxSOC. The latter two signals, i.e., TxSOCand RxSOC, provide an indication of the start of the payload within therespective VDSL frame to the CPE for both transmission and reception.

[0014] It is intended that the SOC signal be used by the CPE tosynchronize the transmission and reception of the data to and from VDSLmodem. In the case of transporting Ethernet data over the VDSL facility,a problem arises, however, when attempting to sync Ethernet frames toVDSL frames. The problem with using these SOC signals is that the VDSLframe is a fixed number of bytes, e.g., 256 bytes, whereas the Ethernetframe may vary from 64 to 1518 bytes. Designing and implementing thecircuitry, e.g., state machines, timing and framing circuits, etc., toperform the protocol matching, i.e., sync timing between Ethernet framesand VDSL frames is very complicated and hence expensive to implement.

[0015] It is desirable to have a means of transporting Ethernet framedata over a VDSL transport facility that does not require thecomplicated circuitry and state machines when utilizing the SOC signalsprovided by the VDSL modem.

[0016] One of the challenges in implementing a mechanism of transportingEthernet traffic over VDSL is the requirement of enabling the recipientto synchronize to the Ethernet stream, i.e., to enable the receiver to‘know ’ where the Ethernet frame starts and where it ends. The Ethernetframes are normally conveyed to the Ethernet transceiver from the lineutilizing Manchester encoding. This code comprises three states whichare IDLE where the signal is constantly high, a ‘1 ’ or a ‘0’ bitwherein each contains a transition at the midpoint of the bit period.

[0017] The direction of the transition determines whether the bit isinterpreted as a ‘0’ or a ‘1’. The first half is the actual value andthe second half is the complement of the actual bit value. By using thiscoding scheme, the transceiver is able to ‘know ’ where an Ethernetpacket starts and where it ends.

[0018] This coding scheme, however, cannot be applied to a VDSLtransport system because the VDSL receiver would receive at its inputeither a ‘1’ or a ‘0’ without any mechanism for the user to indicate tothe VDSL transceiver where an incoming Ethernet frame starts or where itends, e.g., Tx_Enable or Rx_Enable. The same problem is present in thereverse direction as well, wherein the VDSL transceiver transmits a bitstream with no mechanism to indicate where in the bit stream theEthernet frame starts or ends.

[0019] As described above, a typical VDSL transceiver provides a SOCsignal for the transmit and receive directions. It is intended thatthese signals permit the user to synchronize the Ethernet frames.Because these frames are of variable length, however, achievingsynchronization using the SOC signals is relatively complicated toimplement and requires a large amount of additional logic. Thus it wouldbe desirable to have an alternative means of synchronizing the Ethernetframe data at the receiver.

SUMMARY OF THE INVENTION

[0020] The present invention is an apparatus for and method ofencapsulating Ethernet frame data in Very high speed Digital SubscriberLine (VDSL) frames. The VDSL frames are transmitted over a point topoint VDSL link where they are subsequently extracted and forwarded asstandard Ethernet frames. The invention utilizes the widely known HDLCcommunications protocol to encapsulate Ethernet frames for transmissionover the VDSL transport facility of the invention. An HDLC controller isemployed to perform the conversion between Ethernet frames and HDLCframes.

[0021] A typical VDSL facility transport system comprises an Ethernet toVDSL Consumer Premises Equipment (CPE) coupled to a DSL AccessMultiplexor (DSLAM) over a VDSL transport facility. The DSLAM istypically located at the curb or before the ‘last mile ’ in a subscriberloop. The Ethernet to VDSL CPE functions to receive a 10BaseT Ethernetsignal and encapsulate the Ethernet frame into an HDLC frame fortransmission over the VDSL facility utilizing the HDLC protocol.Likewise, the Ethernet to VDSL CPE also functions to receive a VDSLsignal in HDLC protocol format, extract Ethernet frames therefrom andoutput them as standard 10BaseT Ethernet signals.

[0022] The DSLAM is adapted to receive HDLC protocol formatted frames,extract Ethernet frames therefrom and generate and output a standardEthernet signal. Likewise, the DSLAM is also adapted to receive standardEthernet frames from an Ethernet input signal and encapsulate them inHDLC frames for transmission over the VDSL facility.

[0023] In accordance with the invention, the SOC signals provided by theVDSL transceiver are not utilized in transmitting the Ethernet framedata over the VDSL facility. Ethernet frames are encapsulated withinHDLC frames and transmitted on the wire pair without regard to the stateof the SOC signals. This overcomes the problems associated withsynchronizing the transmission of the Ethernet data with the SOCsignals.

[0024] The characteristics of the HDLC controller, i.e., the sync flag,are used in the present invention to provide the receiving station anindication of the start of a HDLC frame. The bit stuffing capabilitiesbuilt into the HDLC controller prevent the occurrence of a sync flag inthe data stream.

[0025] The receiving station performs standard HDLC reception todetermine whether the preamble detected is a sync flag indicating thestart of a HDLC frame. The payload of the VDSL frame carries Ethernetframe data that can range from 60 to 1514 bytes. Note that before HDLCencapsulation, the 4 byte Ethernet CRC is extracted.

[0026] An Ethernet controller is used to receive and transmit Ethernetframes to and from the Ethernet physical layer transceiver. Both theHDLC controller and the Ethernet controller can be implemented utilizinga commercially available microprocessor or microcontroller.

[0027] There is provided in accordance with the present invention amethod of transporting Ethernet frames over a Very high speed DigitalSubscriber Line (VDSL) transport facility coupling a first communicationdevice and a second communication device, the method comprising thesteps of receiving an input Ethernet frame data on the firstcommunication device from a first Ethernet compatible communicationdevice coupled thereto, encapsulating the received Ethernet frame withina High level Data Link Control (HDLC) frame, transmitting the HDLC frameover the VDSL transport facility, receiving HDLC frame data on thesecond communication device, extracting the Ethernet frame from thereceived HDLC frame and generating an output Ethernet frame therefromand transmitting the output Ethernet frame to a second Ethernetcompatible communication device coupled to the second communicationdevice.

[0028] The step of encapsulating comprises the step of stripping off thepreamble, start of frame fields and Cyclic Redundancy Check (CRC) fieldsfrom the Ethernet frame and calculating a new CRC before placing theEthernet frame in the HDLC frame. The step of generating comprises thestep of adding Ethernet preamble and Ethernet start of frame fields andcalculating a new CRC and appending it to the extracted Ethernet frame.

[0029] There is also provided in accordance with the present inventionan Ethernet transport system for transporting Ethernet frames over oneor more Very high speed Digital Subscriber Line (VDSL) transportfacilities, the system comprising a plurality of channels wherein eachchannel comprises an Ethernet to VDSL Customer Premise Equipment (CPE)adapted to encapsulate Ethernet frames from a first Ethernet source intoHDLC frames for transmission over the VDSL transport facility and toextract Ethernet frames from HDLC frames received over the VDSLtransport facility, an access multiplexor adapted to interface with theplurality of channels, the access multiplexor adapted to encapsulateEthernet frames from a second Ethernet source into HDLC frames fortransmission to one of the plurality of channels and to extract Ethernetframes from HDLC frames received over the plurality of channels.

[0030] Each channel in the system comprises a microcontroller adapted tofunction as both an Ethernet controller and an HDLC controller.

[0031] There is further provided in accordance with the presentinvention an Ethernet transport system for transporting Ethernet framesover one or more Very high speed Digital Subscriber Line (VDSL)transport facilities, the system comprising a plurality of channelswherein each channel comprises an Ethernet to VDSL Customer PremiseEquipment (CPE), each CPE comprising means for receiving an Ethernetframe from a first Ethernet source and encapsulating it within a Highlevel Data Link Control (HDLC) frame, means for transmitting the HDLCframe onto one of the VDSL transport facilities, means for receiving theHDLC frame from one of the VDSL transport facilities and means forextracting the Ethernet frame from the HDLC frame and forwarding it tothe first Ethernet source, an access multiplexor adapted to interfacewith the plurality of channels, the access multiplexor comprising anEthernet switch having a plurality of ports, means for receiving fromeach channel, HDLC frames from a corresponding VDSL transport facility,means for extracting Ethernet frames from the HDLC frames and inputtingthen to a port on the switch, means for transmitting Ethernet framesfrom the Ethernet to a second Ethernet source, means for receivingEthernet frames from the second Ethernet source and inputting them tothe switch, means for encapsulating the Ethernet frames output of theswitch into HDLC frames and means for transmitting the HDLC frames ontoone of the VDSL transport facilities

[0032] The means for encapsulating and extracting on each of thechannels comprises a microcontroller adapted to function as an Ethernetcontroller and an HDLC controller.

BRIEF DESCRIPTION OF THE DRAWINGS

[0033] The invention is herein described, by way of example only, withreference to the accompanying drawings, wherein:

[0034]FIG. 1 is a block diagram illustrating a plurality of Ethernet toVDSL CPEs coupled to a DSLAM over a VDSL transport facility thatutilizes the HDLC protocol;

[0035]FIG. 2 is a diagram illustrating the format of a standard Ethernetframe;

[0036]FIG. 3 is a diagram illustrating the interframe gap between twoEthernet frames;

[0037]FIG. 4 is a diagram illustrating the format of HDLC frames thatare transmitted over the VDSL facility;

[0038]FIG. 5 is a block diagram illustrating the Ethernet to VDSL CPE inmore detail;

[0039]FIG. 6 is a block diagram illustrating the Ethernet/HDLC converterin more detail; and

[0040]FIG. 7 is a block diagram illustrating the DSL Access Multiplexor(DSLAM) in more detail.

DETAILED DESCRIPTION OF THE INVENTION

[0041] Notation Used Throughout The following notation is usedthroughout this document. Term Definition ADSL Asymmetric DigitalSubscriber Line AGC Automatic Gain Control ANSI American NationalStandards Institute CAD Computer Aided Design CAP Carrierless AmplitudeModulation/Phase Modulation CPE Consumer Premises Equipment CRC CyclicRedundancy Check DBS Direct Broadcast Satellite DC Direct Current DSLDigital Subscriber Line DSLAM DSL Access Multiplexer EEPROM ElectricallyErasable Programmable Read Only Memory EPROM Erasable Programmable ReadOnly Memory ETSI European Telecommunications Standards Institute FCSFrame Check Sequence FDM Frequency Division Multiplexing FEXT Far EndCrosstalk FTTB Fiber to the Building FTTC Fiber to the Curb FTTCab Fiberto the Cabinet FTTEx Fiber to the Exchange FTTH Fiber to the Home FTTNFiber to the Node HDLC High level Data Link Control HFC Hybrid FiberCoax IFG Interframe Gap ISDN Integrated Services Digital Network LAPDLink Access Procedure D MAU Media Attachment Unit MMDS MultichannelMultipoint Distribution Service MPEG Motion Picture Entertainment GroupNEXT Near End Crosstalk ONU Optical Network Unit OSI Open SystemsInterconnect PC Personal Computer PLS Physical Layer Signaling POTSPlain Old Telephone Service PROM Programmable Read Only Memory QAMQuadrature Amplitude Modulation QoS Quality of Service RF RadioFrequency RFI Radio Frequency Interference SCC Serial CommunicationController SDLC Synchronous Data Link Control SDRAM Synchronous DynamicRandom Access Memory SNMP Simple Network Management Protocol SOC Startof Cell SOF StartofFrame USSB US Satellite Broadcasting UTP UnshieldedTwisted Pair VDSL Very High Speed Digital Subscriber Line WWW World WideWeb

General Description

[0042] The present invention is an apparatus for and method ofencapsulating Ethernet frame data in HDLC frames for transport over aVery high speed Digital Subscriber Line (VDSL) facility. The HDLCprotocol formatted frames are transmitted over a point to point VDSLlink where they are subsequently extracted and forwarded as standardEthernet frames. The invention utilizes the widely known HDLCcommunications protocol to encapsulate Ethernet frames for transmissionover the VDSL transport facility of the invention. An HDLC controller isemployed to perform the conversion between Ethernet frames and HDLCframes.

[0043] As used throughout this document, the term HDLC frame is intendedto denote a frame of data having a variable length that is transmittedover the VDSL transport facility. The HDLC frame appears on the line asa VDSL standard compatible analog signal representing the contents ofthe HDLC frame. The length of the HDLC frame varies in accordance withthe length of the Ethernet frame encapsulated within. The HDLC frame ofthe present invention bears no relationship and should not be confusedwith the VDSL frame having a fixed length of 405 bytes as described inthe VDSL Draft Specification published by the ANSI T1E1.4 Subcommittee.

[0044] A block diagram illustrating a plurality of Ethernet to VDSL CPEscoupled to a DSLAM over a VDSL transport facility that utilizes the HDLCprotocol is shown in FIG. 1. The system, generally referenced 10,comprises one or more channels 12 labeled channel #1 through channel #N.Each channel comprises an Ethernet to VDSL Consumer Premises Equipment(CPE) 14 coupled to an Ethernet source 18 on one side and a VDSLtransport facility 16 on the other. Each channel is coupled, via theirrespective VDSL facilities 16 to a DSL Access Multiplexor (DSLAM) 20.The DSLAM 20 is also coupled to a Fast Ethernet source 22, e.g.,100BaseTx or 100BaseFx Ethernet source.

[0045] Each Ethernet to VDSL CPE 14 functions to receive a 10BaseTEthernet signal 18 and encapsulate the Ethernet frame into an HDLC framefor transmission over the VDSL facility 16. Likewise, the Ethernet toVDSL CPE 14 also functions to receive an HDLC formatted signal over theVDSL facility and extract Ethernet frames therefrom for output asstandard 10BaseT Ethernet signals 18.

[0046] The DSLAM 20 is adapted to receive HDLC frames, extract Ethernetframes therefrom and generate and output a standard Ethernet signal.Likewise, the DSLAM 18 is also adapted to receive standard Ethernetframes from an Ethernet input signal 20 and encapsulate them in HDLCframes for transmission over the VDSL facility 16.

[0047] The VDSL facility 16 may comprise any suitable transport facilitythat is capable of transporting 10BaseT Ethernet data from one point toanother. Preferably the VDSL facility conforms to the VDSL standardwhich is currently a draft specification being formulated by the ANSIT1E1.4 Technical Subcommittee.

[0048] A transport facility suitable for use with the present inventionis the 10BaseS transport facility described in detail in U.S.application Ser. No. 08/866,831 filed May 30, 1997, entitled ‘EthernetTransport Facility Over Digital Subscriber Lines,’ similarly assignedand incorporated herein by reference. A brief description of thistransmission system is given below.

[0049] The 10BaseS transport facility is capable of transmitting 10 MbpsEthernet over existing copper infrastructure. The system utilizescarrierless amplitude and phase modulation (CA P) which is a version ofsuppressed carrier quadrature amplitude modulation (QAM). QAM is themost commonly used form of high speed modulation over voice telephonelines. The system also utilizes frequency division multiplexing (FDM) toseparate downstream channels from upstream channels. In addition, FDM isalso used to separate both the downstream and the upstream channels fromPOTS and ISDN signals. A substantial distance in frequency is maintainedbetween the lowest data channel and POTS frequencies to permit the useof very simple and cost effective POTS splitters, which are actuallysplitters/combiners. The upstream channel is placed above the downstreamchannel in frequency. The downstream and upstream data channels areseparated in frequency from bands used for POTS and ISDN, enablingservice providers to overlay 10BaseS on existing services.

[0050] The 10BaseS system combines copper access transmission technologyof Ethernet based services with Quality of Service (QoS) guaranteed bythe SRVP protocol and is capable of being fully managed through an SNMPagent. The 10BaseS transport facility can deliver symmetrical data at11.78 Mbps (net 10.6 Mbps) over unshielded twisted pair (UTP) telephonewires originally intended for bandwidths of between 300 Hz and 3.4 KHz.QAM modulation and blind equalization are used to achieve a hightransmission speed over existing copper infrastructure. In addition, thesystem is able to cope with several sources of noise such as impulsenoise, e.g., POTS transients, radio frequency interference (RFI) noiseand crosstalk noise, i.e., both near end crosstalk (NEXT) and far endcrosstalk (FEXT). In terms of RF emissions, the system can operate usingunderground cabling as well as overhead distribution cabling.

[0051] A diagram illustrating the format of a standard Ethernet frame isshown in FIG. 2. A standard Ethernet frame, generally referenced 30,comprises a plurality of fields. The fields include a 7 byte preamble 32consisting of 0xAA characters, a one byte Start of Frame (SOF) character34 consisting of 0xAB, a 6 byte destination address 36, a 6 byte sourceaddress 38, 2 byte type/length 40, a data field 42 having a length from46 to 1500 bytes, and a 4 byte Frame Check Sequence 44 that comprises aCRC check. The type/length field 40 may comprise either type or lengthdata, depending on the variant of Ethernet used. The fields comprisingthe destination address 36, source address 38, type/length 40, data 42and FCS 44 are commonly referred to as the Ethernet frame. Note that theEthernet frame may comprise from 64 to 1518 bytes depending on the sizeof the data field. Data shorter than 46 bytes is padded to a minimum of46 bytes.

[0052] In accordance with the 802.3 standard, Ethernet data istransmitted using Manchester coding whereby an idle character istransmitting using DC and a ‘0’and ‘1’ characters are transmitted havinga transition half way through the symbol, the transition for a ‘0’ beingopposite that for ‘1’.

[0053] A diagram illustrating the interframe gap between two Ethernetframes is shown in FIG. 3. The Ethernet IEEE 802.3 standard provides fora minimum Interframe Gap (IFG) of 9.6 ?s between frames to facilitatecollision detection and avoidance. The 9.6 ?s IFG is equivalent to 12bytes for 10 Mbps Ethernet. An example is shown whereby two Ethernetframes 50, 52 are separated by an IFG of 9.6 ?s. The IFG is removed bythe CPE 14 and is not transmitted over the VDSL facility. The IFG isinserted, however, when transmitting Ethernet frames constructed fromHDLC frame data received over the VDSL facility.

[0054] A diagram illustrating the format of HDLC frames that aretransmitted over the VDSL facility (or 10BaseS facility) is shown inFIG. 4. The HDLC frame, generally referenced 60, comprises a 1 byteopening flag field 62, a 2 byte address field 64, a one byte controlfield 66, a data field 68 that may range from 60 to 1514 bytes, a 2 or 4byte CRC check field 70 and a closing flag field 72. Note that dependingon the configuration of HDLC, the address field may be 8, 16 or 8N bits,the control field 8 or 216 bits and the CRC field 16 or 32 bits.

HDLC

[0055] In accordance with the present invention, Ethernet frames areencapsulated into HDLC frames and transported via the VDSL transmissionfacility. The High level Data Link Control (HDLC) protocol documented inISO 3309 specifies a packetization standard for serial links. HDLCsupports several modes of operation, including a simple sliding windowmode for reliable delivery. Since many networks such as the Internetprovide retransmission capability at the upper layers in the OSIcommunications stack, i.e., TCP, most Internet applications utilize theunreliable delivery mode Unnumbered Information feature of HDLC.

[0056] HDLC is one of the most common protocols in the data link layer(layer 2) of the OSI communication stack. Many variants of HDLC havebeen developed. For example, both protocols PPP and SLIP utilize asubset of the functionality of HDLC. The D channel in ISDN utilizes aslightly modified version of HDLC. The default serial link encapsulationof Cisco routers is HDLC. In addition, other common Layer 2 protocols,such as SDLC, SS7, AppleTalk, LAPB and LAPD are based on HDLC and itsframing structure.

[0057] Characteristic to HDLC frames are flag characters 0x7E or0b01111110 that are placed at the beginning and the end of the frame. Inaccordance with the protocol, flag characters may not appear in theintervening data, i.e., any data transmitted between the flagcharacters. To enforce this requirement, the data is modified in atransparent manner using a zero insertion/deletion process known as bitstuffing. Bit stuffing ensures that a data bit pattern matching the flagcharacter (delimiter flag) does not occur in a field between flags. Onbit synchronous links, a ‘0’ is inserted after every sequence of five‘1’s. The longest sequence of ‘1’s that may appear over the link (otherthan flag characters) is 0b0111110, which is one less ‘1’ than the flagcharacter.

[0058] The HDLC receiver is adapted to remove the ‘0’s inserted into thedata stream. After seeing five consecutive ‘1’s, the receiver examinesnext bit. If the next bit is a ‘0’, the bit is discarded and the frameprocessing continues. If the next bit is a ‘1’, then the detection of aflag character sequence at the end of the frame is indicated.

[0059] The HDLC frame is synchronous and relies on the physical layerfor clocking and synchronization of the transmitter and receiver. Anaddress field carries the destination address of the frame because theLayer 2 frame can be sent over point to point link, broadcast networks,packet switched or circuit switched systems. The control field providesflow control number and defines the frame type, i.e., control or data.The length of the data field depends on the frame protocol. Typically,Layer 3 frames are carried in this data field. In accordance with theinvention, variable length Layer 2 Ethernet frames are carried in thedata field.

[0060] At the end of a frame, a Frame Check Sequence (FCS) is used toverify the integrity of the data. The FCS may be 16 or 32 bits longdepending on the implementation. The FCS is a Cyclic Redundancy Check(CRC) checksum calculated using the following polynomial.

X¹⁶+X¹²+X⁵+1  (1)

[0061] Between the transmission of HDLC frames, the line idles. Mostsynchronous links constantly transmit data whereby all ‘1’s are sentduring the inter-frame periods, i.e., mark idle, or all flag charactersare sent, i.e., flag idle.

[0062] The data field can have a length from 60 to 1514 bytes. Thiscorresponds to the Ethernet frame being encapsulated. Note that beforethe Ethernet frame is encapsulated, its 4 byte FSC (CRC) field isstripped off, thus reducing the data field length by 4 bytes.

[0063] It is important to note that in accordance with the presentinvention, as described previously, the HDLC frame is transmittedwithout the use of the Tx or Rx SOC signals provided by the VDSLtransceiver. In place of the SOC signals, the standard HDLC protocolperforms the role of providing a means for the receiver in the VDSLtransceiver to know when an HDLC frame begins.

Ethernet to VDSL CPE

[0064] The Ethernet to VDSL CPE unit will now be described in moredetail. A block diagram illustrating the Ethernet to VDSL CPE in moredetail is shown in FIG. 5. The Ethernet to VDSL CPE 14 functions toreceive a 10BaseT Ethernet signal and encapsulate the Ethernet frameinto a HDLC frame for transmission over the VDSL facility. In theopposite direction, the Ethernet to VDSL CPE 14 functions to receive aVDSL signal in HDLC protocol format, extract Ethernet frames therefromand output them as standard 10BaseT Ethernet signals.

[0065] The Ethernet to VDSL CPE unit 14 comprises Ethernet circuitrythat includes magnetics 80 and Ethernet physical layer transceiver 82.The magnetics 80 interfaces to the 10BaseT Ethernet line 18 andgenerally comprises an isolation transformer and optionally one or morefilters. The Ethernet physical layer transceiver 82 functions to performthe physical layer signaling (PLS) and Media Attachment Unit (MAU)functions as defined by the IEEE 802.3 specification for use with10BaseT Ethernet networks. An Ethernet physical layer transceiversuitable for use with the present invention comprises the LXT905 10BaseTEthernet transceiver manufactured by Level One Communications, Inc.,Sacramento, Calif.

[0066] The Ethernet to VDSL CPE 14 also comprises an Ethernet/HDLCconverter 84, memory 85, VDSL transceiver 86, analog front end 88 andcontroller 90. The output of the Ethernet physical layer transceiver 82is input to the Ethernet/HDLC converter 84. The function of theconverter is to encapsulate Ethernet frames received from the physicallayer transceiver 82 into HDLC frames. In the other direction, theconverter is adapted to extract Ethernet frames from the HDLC framesreceived from the VDSL facility. The physical layer transceiver 82communicates with the Ethernet/HDLC converter 84 via a plurality ofsignal lines that comprise Tx and Rx data and control line, includingclock and enable lines.

[0067] The converter 84 comprises an integral Ethernet controller toreceive and transmit Ethernet frames to and from the Ethernet physicalpayer transceiver 82. Both the HDLC controller and the Ethernetcontroller can be implemented utilizing a commercially availablemicroprocessor or microcontroller.

[0068] The controller 90 functions to control the operation of thephysical layer transceiver 82, Ethernet/HDLC converter 84 and VDSLtransceiver 86. The converter stores frames during the conversionprocess in a buffer within memory 85.

[0069] The characteristics of the standard HDLC protocol, e.g., the syncflag, are used in the present invention to provide the receiving stationan indication of the start of a HDLC frame. The bit stuffingcapabilities built into the HDLC controller prevent the occurrence of async flag in the data stream.

[0070] The receiving station performs standard HDLC reception todetermine whether the preamble detected is a sync flag indicating thestart of a HDLC frame. The payload of the HDLC frame carries Ethernetframe data that can range from 60 to 1514 bytes.

[0071] The output of the converter 84 is input to the VDSL transceiver86. The VDSL transceiver 86 functions to encode the received HDLC framebit stream into a VDSL compatible analog signal. In the oppositedirection, the VDSL transceiver functions to receive the HDLC frame asan analog VDSL signal and output the HDLC in digital form.

[0072] A VDSL modem suitable for use in constructing the VDSLtransceiver 86 of the present invention comprises the BCM6010 VDSLTransceiver manufactured by Broadcom, Irvine, Calif. or a VDSL modemmanufactured by Savan Communications Ltd., Netanya, Israel.

[0073] The output of the VDSL transceiver 86 is input to an analog frontend 88. The analog front end comprises a line driver amplifier in thetransmit direction, Automatic Gain Control (AGC) circuit in the receivedirection, isolation transformer and hybrid filters. The analog frontend 88 generates the analog VDSL signal for transmission onto the VDSLcopper line 16. The analog front end provides the interface in thereceive direction that functions to receive the analog VDSL signal fromthe VDSL copper line and pass the signal through an AGC and filtersbefore outputting it to the VDSL transceiver 86.

[0074] It is important to note that, in accordance with the invention,the SOC signals provided by the VDSL transceiver 86 are not utilized intransmitting the Ethernet frame data over the VDSL facility. Ethernetframes are encapsulated within HDLC frames and transmitted on the wirepair without regard to the state of the SOC signals. This overcomes theproblems associated with synchronizing the transmission of the Ethernetdata with the SOC signals.

[0075] In the Ethernet to VDSL direction, Ethernet frames are receivedover the 10BaseT Ethernet input signal port 18 and are input to themagnetics module 80. The analog output of the magnetics is input to theEthernet physical layer transceiver 82. The Ethernet signals are input,via Tx and Rx data and control lines, to the Ethernet/HDLC convertercircuitry 84 which functions to encapsulate the Ethernet frame datareceived over the Ethernet port 18 into HDLC frames. The HDLC frames arethen forwarded to the VDSL transceiver 86. The VDSL transceiver 86functions to modulate the HDLC frame data and generate an analog VDSLsignal that is input to the analog front end 88 which contains linedrivers and filters. The signal output of the analog front end 88 issuitable for transmission over the twisted wire pair 16. Note that theHDLC frames may be transmitted using the 10BaseS transport facilitydescribed above.

[0076] In the VDSL to Ethernet direction, VDSL signals received over thetwisted pair wire 16 (which may comprise 10BaseS signals) are receivedby the analog front end 88 which comprises an AGC circuit and one ormore filters. The output of the analog front end 88 is input to the VDSLtransceiver 86. The VDSL transceiver 86 functions to demodulate theanalog signal received over the twisted pair wire 16 and output HDLCframes in digital form to the Ethernet/HDLC converter circuitry 84. TheEthernet/HDLC converter circuitry 84 functions to extract the Ethernetframe data encapsulated within the HDLC frame and generate standardEthernet frames which are then forwarded to the Ethernet physical layertransceiver 82 for transmission over the 10BaseT port 18 via themagnetics module 80 which contains and isolation transformer and one ormore filters.

[0077] The VDSL transceiver 86 functions to provide the clocking viaTxCLK and RxCLK signals for both transmit and receive data signalsTxData, RxData. In addition, the transceiver 86 provides a RxErr signalthat is asserted when an error is detected in the received data. Anerror condition may comprise a framing error, loss of synchronization ofthe receive signal, etc. Further, the transceiver 86 provides a Tx andRx Start of Cell (SOC) signal, TxSOC, RxSOC. The SOC signals, as definedin the VDSL draft standard, are suitable for use in transporting ATMcell data over VDSL but are suitable also for general use insynchronizing the TxData signal input to the transceiver and the RxDataoutput of the transceiver. The Tx and Rx SOC signals provide a pulse atthe beginning of the VDSL frame. A VDSL frame comprises a fixed numberof bytes, e.g., 256, which has no relation to the number of bytes in anEthernet frame.

[0078] As discussed previously in the Background Section of thisdocument, the circuitry required is very complex to design tosynchronize Ethernet frames to the VDSL frames in accordance with theSOC signals. The present invention overcomes this problem by sending andreceiving Ethernet frame data over VDSL asynchronously with respect tothe Tx or Rx SOC signals. The invention functions to transmit theEthernet frame data over the VDSL channel without utilizing the Tx or RxSOC signals. This eliminates any problems associated with synchronizingthe Ethernet data to the SQC data. Problems include, for example,breaking up the Ethernet frame data into multiple sections to fit withinthe smaller VDSL frames (when the Ethernet frame exceeds 256 bytes) andsubsequently regenerating the Ethernet frame by assembling the multiplesmaller sections.

[0079] The Ethernet/HDLC converter will now be described in more detail.A block diagram illustrating the Ethernet/HDLC converter in more detailis shown in FIG. 6. The Ethernet/HDLC converter, generally referenced100, can be implemented using any suitable microprocessor ormicrocontroller. In one embodiment, the converter is implemented usingthe Motorola MPC850 or MPC860 PowerQUICC series of microcontrollersmanufactured by Motorola, Schaumburg, Ill. Note that one skilled in theart can apply the principles of the present invention to othermicrocontrollers or microprocessors as well. Note also that referencesto the MPC860 also refer to the MPC850.

[0080] The MPC860 comprises two onboard Serial CommunicationsControllers (SCCs) which are utilized by the present invention. Once SCCis configured as an Ethernet controller (transmit and receive) and theother SCC is configured as an HDLC controller (transmit and receive).The functional blocks pertinent to the invention are shown in FIG. 6.Note that the complete functional description of the MPC 860 is notshown or described here. A detailed description of the MPC860 can befound in the Motorola MPC860 PowerQUICC Users Manual, July, 1998,incorporated herein by reference.

[0081] The Ethernet transceiver (SCC #1) 102 is operative to receive theseven signal interface to the Ethernet physical player transceiver 82(FIG. 5). The seven signals comprise TxData, TxCLK, TxEnable, RxData,RxCLK, Rx, Enable and a Collision indication signal. The HDLCtransceiver (SCC #2) 114 is operative to interface to the VDSLtransceiver 86 (FIG. 5) via four signals including TxData, TxCLK, RxDataand RxCLK.

[0082] Both the Ethernet transceiver 102 and the HDLC transceiver 114are adapted to read and write from data memory 104 via memory interface108. The data memory may comprise any suitable memory including but notlimited to Synchronous DRAM (SDRAM), static RAM, etc. The functionalityof the MPC860 that is not shown explicitly is represented by themicroprocessor core/controller block 110. Note that the core, suitablyprogrammed, functions as the controller for the CPE 14.

[0083] A port interface circuit 112 provides a control interface toconfigure and control the VDSL transceiver and the physical layertransceiver. A program memory 106 functions to store the software, i.e.,firmware, that the MPC860 executes. The program memory may comprise anysuitable non volatile memory including but not limited to PROM, EPROM,EEPROM, FLASH, etc.

[0084] The software is suitably configured to perform, among otherthings, the configuration of both the Ethernet controller and the HDLCcontroller. Once the SCCs are configured as Ethernet and HDLCcontrollers, their operations are asynchronous with the core and can beeither synchronous or asynchronous with respect to each other.

[0085] The Ethernet transceiver functions to receive Ethernet framesfrom the physical layer transceiver and verify the FCS. After the FCS isverified, it is stripped off and the frame is stored in data memory 104.The HDLC transceiver is operative to start sending flags once enabledand is notified on the availability of a frame stored in the data memory104 awaiting transmission via the appropriate buffer descriptors. If oneor more frames are found to be waiting transmission, the HDLC controllerfetches the next frame from the data memory and begins sending the frameafter the minimum number of flags specified between frames. When the endof the current buffer is reached, a new CRC is calculated and appendedto the frame. Following the CRC, a closing flag is appended. The data isclocked out of the MPC860 to the VDSL transceiver using the TxData andTxCLK signal lines.

[0086] In the receive direction, the HDLC transceiver 114 receives theHDLC frames over the RxData and the RxCLK signal lines from the VDSLtransceiver. The HDLC transceiver performs address recognition, CRCchecking and maximum frame length checking. Once configured by the core,the HDLC receiver waits for the opening flag character. When it detectsthe first byte of the frame, it compares the frame address with the userdefined values. If an address match is found, the remainder of theincoming frame is transferred to a buffer in the data memory 104.

[0087] When the frame ends, i.e., a closing flag character is received,the CRC field is checked against the recalculated value. The CRC isstripped off before it is stored in the data memory 104.

[0088] The Ethernet controller periodically polls the data memory forframes waiting transmission to the Ethernet port. If the buffer in thedata memory is not empty, as indicated by a buffer descriptor, the nextavailable frame is read from the data memory and a new FCS is calculatedand appended to the frame. The complete Ethernet frame is output to thephysical layer transceiver via the RxData, RxCLK and RxEnable signallines.

Digital Subscriber Line Access Multiplexor

[0089] The Digital Subscriber Line Access Multiplexor (DSLAM) of thepresent invention will now be described in more detail. A block diagramillustrating the DSL Access Multiplexor (DSLAM) in more detail is shownin FIG. 7. A typical VDSL facility transport system comprises anEthernet to VDSL Consumer Premises Equipment (CPE) coupled to a DSLAccess Multiplexor (DSLAM) over a VDSL transport facility as illustratedin FIG. 1. The DSLAM is typically located at the curb or before the‘last mile’ in a subscriber loop.

[0090] As described previously, the DSLAM 20 functions to encapsulateand extract Ethernet frames into and from HDLC frames from a pluralityof channels. The DSLAM is adapted to receive HDLC frames from a numberof channels, extract Ethernet frames therefrom and generate and output astandard Ethernet signal. In the opposite direction, the DSLAM isadapted to receive standard Ethernet frames from an Ethernet inputsignal and encapsulate them in HDLC frames for transmission over theVDSL facility to any of the attached channels.

[0091] The DSLAM typically is adapted to generate a plurality of VDSLstreams to be transmitted over a plurality of VDSL facility channels 16labeled channel #1 through channel #N. The VDSL signal received overeach VDSL channel 16 is processed by channel circuitry 120. Each channelcircuit 120 comprises an analog front end 122, VDSL transceiver 124 andEthernet/HDLC converter 126.

[0092] The analog front end 122, VDSL transceiver 124 and Ethernet/HDLCconverter 126 function similarly to the analog front end 88, VDSLtransceiver 86 and Ethernet/HDLC converter 84 described in connectionwith FIG. 5, therefore a description of these elements will not berepeated here. Note, however, that an Ethernet/HDLC converter suitablefor use with the present invention comprises the RJ-017 ChipBridgemanufactured by Rad Data Communications Ltd., Israel. The RJ-017ChipBridge is a full remote Ethernet bridge with an Ethernet interfaceon one side and an HDLC controller on the other. The chip performs fullHDLC bit stream conversion, zero bit insertion/deletion, bit rateadaptation and provides an Ethernet front end.

[0093] On the Ethernet side, the DSLAM comprises a high speed Ethernetport 22 at the back end, magnetics module 143, an Ethernet physicallayer transceiver 132 and an Ethernet switch 130. Each of the channels120 interfaces to an Ethernet port on the Ethernet switch 130. Theswitch 130 may comprise any number of ports to accommodate the number ofchannels. Preferably, the switch comprises N 10BaseT ports and at leastone Fast Ethernet port. The Fast Ethernet physical layer transceiver 132functions to perform the physical layer signaling (PLS) and MediaAttachment Unit functions as defined by the IEEE 802.3 specification foruse with 10BaseT and 100BaseT Ethernet networks.

[0094] A controller 136 functions to control the operation of the VDSLtransceivers 124, Ethernet/HDLC converters 126, Ethernet switch 130 andFast Ethernet physical layer transceiver 132.

[0095] In the Ethernet to VDSL direction, Ethernet frames are receivedover the 100BaseT Fast Ethernet port 22 and are input to the magneticmodule 134. The output of the magnetics is input to the Fast Ethernetphysical layer transceiver 134. The magnetics 134 and physical layertransceiver 132 function similarly to the magnetics 80 and physicallayer transceiver 82 described in connection with FIG. 5.

[0096] The Fast Ethernet signals are subsequently input to an Ethernetswitch 130 capable of switching at Fast Ethernet speeds between N ports.The GT48212 Switched Ethernet Controller manufactured by GalileoTechnology, San Jose, Calif. can be used to construct the Ethernetswitch of the present invention. The switch 130 is coupled to N channels120 each comprising an Ethernet/HDLC converter 126 that performsEthernet encapsulation and extraction to/from HDLC.

[0097] The converters 126 function to encapsulate the Ethernet framedata output from each of the ports of the switch 130 into HDLC framesand forward them to their respective VDSL transceivers 124. The VDSLtransceivers 124 modulate the HDLC frame data and generate a signal thatis the input to the analog front end 122. The output of the analog frontend is a VDSL signal suitable for transmission over the twisted wirepairs 16. Note that the HDLC signal may be transmitted using the 10BaseStransport facility described above.

[0098] In the VDSL to Ethernet direction, for each channel, VDSLsignals, e.g., 10BaseS signals, are received by the analog front end andoutput to the VDSL transceiver 124. A VDSL modem suitable for use inconstructing the VDSL transceivers 124 of the present inventioncomprises the BCM6010 VDSL Transceiver manufactured by Broadcom, Irvine,Calif. or a VDSL transceiver manufactured by Savan Communications Ltd.,Netanya, Israel.

[0099] Each VDSL transceiver 124 functions to demodulate the signalreceived over the twisted pair wires 16 and output HDLC frames toEthernet/HDLC converter 126. The Ethernet/HDLC converter 126 functionsto extract the Ethernet frame data encapsulated within the HDLC frameand generate standard Ethernet frames, which are then input to thecorresponding port on the Ethernet switch 130. The switch forwards theEthernet frames to the physical layer transceiver 132 for transmissionover the 100BaseT port 22 via the magnetics module 134. Alternatively,the Ethernet frames may be transmitted to a 100BaseFx port via anoptical transceiver.

[0100] Note that one skilled in the art could implement the CPE andDSLAM devices of the present invention using different componentswithout departing from the scope of the present invention.

[0101] While the invention has been described with respect to a limitednumber of embodiments, it will be appreciated that many variations,modifications and other applications of the invention may be made.

What is claimed is:
 1. A method of transporting Ethernet frames over aVery high speed Digital Subscriber Line (VDSL) transport facilitycoupling a first communication device and a second communication device,said method comprising the steps of: receiving an input Ethernet framedata on said first communication device from a first Ethernet compatiblecommunication device coupled thereto; encapsulating said receivedEthernet frame within a High level Data Link Control (HDLC) frame;transmitting said HDLC frame over said VDSL transport facility;receiving HDLC frame data on said second communication device;extracting said Ethernet frame from said received HDLC frame andgenerating an output Ethernet frame therefrom; and transmitting saidoutput Ethernet frame to a second Ethernet compatible communicationdevice coupled to said second communication device.
 2. The methodaccording to claim 1, wherein said step of encapsulating comprises thestep of stripping off the preamble, start of frame fields and CyclicRedundancy Check (CRC) fields from said Ethernet frame and calculating anew CRC before placing said Ethernet frame in said HDLC frame.
 3. Themethod according to claim 1, wherein said step of generating comprisesthe step of adding Ethernet preamble and Ethernet start of frame fieldsand calculating a new CRC and appending it to said extracted Ethernetframe.
 4. An Ethernet transport system for transporting Ethernet framesover one or more Very high speed Digital Subscriber Line (VDSL)transport facilities, said system comprising: a plurality of channelswherein each channel comprises an Ethernet to VDSL Customer PremiseEquipment (CPE) adapted to encapsulate Ethernet frames from a firstEthernet source into HDLC frames for transmission over said VDSLtransport facility and to extract Ethernet frames from HDLC framesreceived over said VDSL transport facility; an access multiplexoradapted to interface with said plurality of channels, said accessmultiplexor adapted to encapsulate Ethernet frames from a secondEthernet source into HDLC frames for transmission to one of saidplurality of channels and to extract Ethernet frames from HDLC framesreceived over said plurality of channels.
 5. The system according toclaim 4, wherein each channel comprises a microcontroller adapted tofunction as both an Ethernet controller and an HDLC controller.
 6. AnEthernet transport system for transporting Ethernet frames over one ormore Very high speed Digital Subscriber Line (VDSL) transportfacilities, said system comprising: a plurality of channels wherein eachchannel comprises an Ethernet to VDSL Customer Premise Equipment (CPE),each CPE comprising: means for receiving an Ethernet frame from a firstEthernet source and encapsulating it within a High level Data LinkControl (HDLC) frame; means for transmitting said HDLC frame onto one ofsaid VDSL transport facilities; means for receiving said HDLC frame fromone of said VDSL transport facilities; and means for extracting saidEthernet frame from said HDLC frame and forwarding it to said firstEthernet source; an access multiplexor adapted to interface with saidplurality of channels, said access multiplexor comprising: an Ethernetswitch having a plurality of ports; means for receiving from eachchannel, HDLC frames from a corresponding VDSL transport facility; meansfor extracting Ethernet frames from said HDLC frames and inputting thento a port on said switch means for transmitting Ethernet frames fromsaid Ethernet to a second Ethernet source; means for receiving Ethernetframes from said second Ethernet source and inputting them to saidswitch; means for encapsulating said Ethernet frames output of saidswitch into HDLC frames; and means for transmitting said HDLC framesonto one of said VDSL transport facilities.
 7. The system according toclaim 6, wherein said means for encapsulating and extracting on each ofsaid channels comprises a microcontroller adapted to function as anEthernet controller and an HDLC controller.